An integrated circuit conventionally interfaces with external systems using on-chip Input/Output (I/O) devices. These I/O devices are conventionally bidirectional circuits capable of driving large external loads and receiving signals for the core of the integrated circuit.
In a conventional wire bond structure, a die has one or more I/O pads placed around the edge of the die and electrical leads from the die are connected to these I/O devices. As requirements for higher pin count and lower voltage drop have grown, greater cost effectiveness and more flexible interconnect technology have become desirable.
As an alternative to the wire bond structure, flip chip interconnect technology flips the active area of a chip over to face downward. Unlike the wire bond structure, the entire surface area of the chip is available for interconnection using metal bumps over the surface of a die. The metal bumps are then soldered onto a package substrate.
Other conventional approaches included placing the metal bumps in the core to take advantage of the available die area. However, as technology scales down and die sizes reduce, placing pads in the core or the outer edges of the die makes it difficult for the die to accommodate the large number of I/O that the chip requires. As a result, the space between components decreases, increasing the risks of electrostatic damage and the formation of unwanted parasitic structures with low resistance paths, resulting in latch up. Further, because the pads are required to be spaced apart from other circuitry, both low utilization of the die area and routing congestion occurs.
Thus, what is needed is a solution for increasing pin count in a given area while reducing the risk of electrostatic discharge and latch up. The solution should permit pads to be positioned in the core as well as at the edges of the die without the limitations of conventional techniques.